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-rwxr-xr-xctt.py31165logplain
-rw-r--r--ctt_alsc.py10012logplain
-rw-r--r--ctt_awb.py13150logplain
-rw-r--r--ctt_ccm.py6659logplain
-rw-r--r--ctt_config_example.json210logplain
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-rw-r--r--ctt_image_load.py13918logplain
-rw-r--r--ctt_lux.py1904logplain
-rw-r--r--ctt_macbeth_locator.py26100logplain
-rw-r--r--ctt_noise.py3636logplain
-rw-r--r--ctt_pretty_print_json.py2042logplain
-rw-r--r--ctt_ransac.py2191logplain
-rw-r--r--ctt_ref.pgm9641log-rw-r--r--ctt_tools.py3933logplain
lass="hl com"> * follow-up work is not submitted to GPU or other device driver until * after this ioctl has been called with DMA_BUF_SYNC_END? * * If the driver or API with which the client is interacting uses implicit * synchronization, waiting for prior work to complete can be done via * poll() on the DMA buffer file descriptor. If the driver or API requires * explicit synchronization, the client may have to wait on a sync_file or * other synchronization primitive outside the scope of the DMA buffer API. */ struct dma_buf_sync { /** * @flags: Set of access flags * * DMA_BUF_SYNC_START: * Indicates the start of a map access session. * * DMA_BUF_SYNC_END: * Indicates the end of a map access session. * * DMA_BUF_SYNC_READ: * Indicates that the mapped DMA buffer will be read by the * client via the CPU map. * * DMA_BUF_SYNC_WRITE: * Indicates that the mapped DMA buffer will be written by the * client via the CPU map. * * DMA_BUF_SYNC_RW: * An alias for DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE. */ __u64 flags; }; #define DMA_BUF_SYNC_READ (1 << 0) #define DMA_BUF_SYNC_WRITE (2 << 0) #define DMA_BUF_SYNC_RW (DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE) #define DMA_BUF_SYNC_START (0 << 2) #define DMA_BUF_SYNC_END (1 << 2) #define DMA_BUF_SYNC_VALID_FLAGS_MASK \ (DMA_BUF_SYNC_RW | DMA_BUF_SYNC_END) #define DMA_BUF_NAME_LEN 32 #define DMA_BUF_BASE 'b' #define DMA_BUF_IOCTL_SYNC _IOW(DMA_BUF_BASE, 0, struct dma_buf_sync) /* 32/64bitness of this uapi was botched in android, there's no difference * between them in actual uapi, they're just different numbers. */ #define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *) #define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, u32) #define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, u64) #endif