From 954ba8a803c078784dfaa6674e687847f49a1dfb Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Thu, 6 Jul 2023 23:44:47 +0530 Subject: libcamera: pipeline: simple: Support TI CSI-RX New TI SoCs from J7 and AM62 family have a camera pipeline that receives data using Cadence's DPHY-RX and CSI-RX bridge. A pixel-grabbing "shim" IP routes this incoming stream of data to the DMA subsystem, to finally store the frame data in memory. The driver for this is not merged in mainline yet, but v7 was posted [1] on linux-media list a few months ago. With some minor fixes, the work-in-progress v8 series [2] works with the simple pipeline handler, so we enable support for this device. Link: https://lore.kernel.org/all/20230314115516.667-1-vaishnav.a@ti.com/ [1] Link: https://github.com/jailuthra/linux/commits/6ff226ca13f34 [2] Signed-off-by: Jai Luthra Reviewed-by: Laurent Pinchart Reviewed-by: Jacopo Mondi Signed-off-by: Laurent Pinchart --- src/libcamera/pipeline/simple/simple.cpp | 1 + 1 file changed, 1 insertion(+) (limited to 'src/libcamera/pipeline') diff --git a/src/libcamera/pipeline/simple/simple.cpp b/src/libcamera/pipeline/simple/simple.cpp index 7495587c..05ba76bc 100644 --- a/src/libcamera/pipeline/simple/simple.cpp +++ b/src/libcamera/pipeline/simple/simple.cpp @@ -192,6 +192,7 @@ namespace { static const SimplePipelineInfo supportedDevices[] = { { "dcmipp", {} }, { "imx7-csi", { { "pxp", 1 } } }, + { "j721e-csi2rx", {} }, { "mxc-isi", {} }, { "qcom-camss", {} }, { "sun6i-csi", {} }, -- cgit v1.2.1